Silicon Labs /Series1 /EFM32GG12B /EFM32GG12B530F512GQ64 /CAN1 /TEST

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TEST

31282724232019161512118743000000000000000000000000000000000000000000 (BASIC)BASIC0 (SILENT)SILENT0 (LBACK)LBACK0 (CORE)TX0 (RX)RX

TX=CORE

Description

Test Register

Fields

BASIC

Basic Mode

SILENT

Silent Mode

LBACK

Loopback Mode

TX

Control of CAN_TX Pin

0 (CORE): Reset value, CAN_TX is controlled by the CAN Core.

1 (SAMPT): Sample Point can be monitored at CAN_TX pin.

2 (LOW): CAN_TX pin drives a dominant bit (0) value.

3 (HIGH): CAN_TX pin drives a recessive bit (1) value.

RX

Monitors the Actual Value of CAN_RX Pin

Links

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